Created Wednesday 11 March 2020
Damper on proposed midterm.
Chapter 2 and 3 for midterm. He'll be posting updated version of ch.3 up on blackboard.
Questions will come from homework assignments. With some number changes and whatnot.
Have a working copy of logisim for the exam.
We are having an instructional recess until the 19th. The exam will be on the 25th.
No more campus instruction. Everything will be online now.
Sequential Circuits
Combinational logical circuits are perfect for sitatuions when we require the immediate application of a boolean function to a set of inputs.
There are times when we need a circuit to change its value with a consideration to its current state as well as its inputs.
These citcuits have to remember their current state.
Sequential logic circuits provide this functionality for us.
Latches and Flip Flops
SR Latch is a one bit memory.
SR Latch NOR
SR Latch can be built from NOR gates. Output of one NOR gate is the output of another. Requires power to work.
The SR Latch has inputs R and S. It has output Q. Also Not Q or Q with a bar above it.
If R and S both go from 1 to 0 at the same time, we have a race condition. Both S and R should be 0 and only momentarily should one of them become 1 so as to set the latch.
SR Latch NAND
What if we use a nand gate instead? We can do that! If S and R are both 0, then we have an illegal state.
The SR Latch is the building block of sophisticated memory circuits!
JK Flip-FLop
What if we take a SR Latch and add an enable?
What if we make an SR Flip Flop? In a latch, the outputs will change whenever the inputs change. For a flip flop, there are changes whenever a clock pulses (goes from low to high). When the clock rising edge raises then it...
Even in the SR flip flop, if R and S are true when we get a high edge clock impulse then we don't know which one will end up true. It's unpredictable. Whichever one just so happens to be faster will light up.
However! There's a way we can make it a little more predictable and that's with a JK Flip Flop! (jk don't mean anything. Just the letters they chose cause it's a little different than SR).
So then, let's say we have J and K such to 1. Now, we get a clock pulse, what happens? Well, we simply toggle Q and ~Q from whatever they previously were (as opposed to the SR Flip Flop where it was a race condition so we had no idea what would happen).
Although the video uses NOR gates, it should be NAND our professor notes.
D Flip-Flop
Is a modification of the SR flip-flop.
You will notice that the output of the flip-flop remains the same during subsequent clock pulses. The output changes only when the value of D changes.
D flip-flop is fundamental circuit of computer memory.
FSMs
The behavior of sequential circuits can be expressed using characteristic tables of finite state machines FMS.
FMSs consist of a set of nodes that hold the states of the machine and a set of arcs that connect the states.
Moore and Mealy machines are two types of FSMs that are equivalent.
They differ only in how they express the outputs of the machine.
Moore Machines place outputs on each node, while Mealy machines present thati outputs on the transitions.
Video showing Moore and Mealy Machines in action:
https://www.youtube.com/watch?v=S352lyPZP00
Mealy and Moore Machines (we'll have a HW assignment based on the first problem he showed)
Although their behavior of Moore and Mealy machines are identical, their implementations differ.
ASM
It is difficult to express the complexities of actual implementations using only Moore and Mealy machines. They do not address intricacies of timing very well. Secondly, it is often the case that an interaction of numerous signals is required to advance a machine from one state to the next.
For these reasons, Christopher Clare invented the Algorithmic State Machine (ASM).
Stateful Application
Sequential circuits are used anytime that we have a stateful application.
A stateful application is one where the next state of the machine depends on the current state of the machine and the input.
A stateful application requires both combinational and sequential logic.
Digital Analysis
explores the relationship between a circuits inputs and its output.
Digital Synthesis
creates logic diagrams using the values specified in a truth table.
Digital systems designers must also be mindful of the physical behaviors of circuits to include minute propagation delays that occur between the time when a circuit's inputs are energized and when the output is accurate and stable.
Whenever something looks perfect on paper, it could go wrong in practice due to slight changes in timing and whatnot.
Chapter 3 Conclusion
Computers are implementations of Boolean logic.
Boolean functions are completely described by truth tables.
Logic gates are small circuits that implement Boolean operators
The basic gates are AND, OR and NOT.
Exam
on the 25th